The fabrication of complimentary metal oxide semiconductor (CMOS) devices involve hundreds of distinct steps, the last third of which is the metallization stage where typically titanium/titanium-nitride/aluminum-silicon-copper-alloys/titanium (Ti/TiN/AlSiCu/Ti) metal patterns of contacts are photolithographically defined. The processing within the "Device" level, i.e., electrically active area, is referred to as the "front-end" processes and those within the "Interconnection and Passivation" levels, such as the metallization stage, are referred to as "back-end" processes.
Following the lithography, the unexposed parts of the photoresist are typically removed either by plasma etching or wet chemical processing by specially engineered organic solvents. During the resist stripping, device layers such as TiN are vulnerable to contamination by trace metals, such as sodium (Na) and iron (Fe), in the stripper solvents, which are major sources of these trace metals, or from non-reagent sources such as the walls of chambers during high temperature plasma etching of resist materials. Wet processing by stripper solvents, in particular, have been identified as the principal Na contamination route and has become a focus of the "Na problem" in CMOS device fabrication.
Metal contamination, in particular Na, is critical for device technology since Na ions lead to degradation of the stability of devices by the mobile Na. For example, the positive Na ions at the Si--SiO.sub.2 (silicon oxide) interface induce a negative image charge in the silicon substrate, which reduces the positive gate bias required to produce a channel current at a given drain voltage. Na densities as low as 10.sup.10 /cm.sup.2 can cause threshold voltage shifts of a few tenths of volts in metal oxide semiconductor field effect transistor (MOSFET) devices with gate thickness of about 1000 A. N-channel devices are generally more sensitive to Na contamination than p-channel transistors. Other contaminants, such as Fe, in dissolved or particulate form, result in degradation or failure of the gate oxide integrity, a problem that becomes increasingly acute as the gate oxide thickness shrinks to &lt;50 A in ultra large scale integrated (ULSI) device structures.
The solvents typically used in the front-end cleaning processes, such as acids, do not pose as great a problem as the solvents that are used in the back-end cleaning process. However because of the presence of the metal runners and interconnect structures that are formed during the back-end processes, different solvents, which are typically organic in nature are used to clean the device. During the back-end cleaning processes, dielectric and metallic films, such as TiN, are particularly vulnerable to contamination by trace alkali and alkali-earth ions, e.g., Na.sup.+, potassium (K.sup.+) and calcium (Ca.sup.2+). This enhanced metal ion contamination is attributable to enhanced metal ion adsorption from the solvents used in the back-end cleaning process.
Exacerbating the contamination problem discussed above, is that the solvents used in the back-end cleaning processes usually contain about 10-15 ppb, i.e, 0.6 to 6.0 E15 atoms/ml solvent, alkali metal ions. With the high absorption rate, generally most of the metal ions in the solvent end up on the wafers.
To prevent or minimize Na contamination, a two-step "cleaning recipe" may be employed. This process involves a post solvent cleaning etch of native/passivating oxide with glycol based selective etchants, e.g., ACSI-NOE or ACT-CE15. This cleaning process, however, is an expensive strategy from the perspective of chemical use and disposal costs, as well as process time. Another strategy for minimizing Na/metallic contamination involves complexing the Na/contaminant with ligands, such as crown ethers, polyalcohols and other clathrates. These organic ligands, however, may be carcinogenic and pose a health risk, so that extreme care must be exercised in the product formulation and utilization.
Accordingly, what is needed in the art is an improved method of back-end cleaning of wafers that mitigates the above-described limitations and substantially reduces the metal ion contaminants in the cleaning solvent.